Ballot: VITA 20R1-200x, Conduction Cooled PMC
Name: Joe Norris
Ballot: DISAPPROVE
Comments:
(1) Since there's a tendency to use the back end of the CCPMC for routing to the PN2 and PN4 connectors and permission 5.5 allows the additional fretting avoidance area to be an OPTIONAL thermal interface, I think a RULE (or perhaps a RECOMMENDATION) may be needed to avoid electrical problems for the CCPMC:

"All areas identified by COMPONENT KEEPOUT shall be free of both components AND conductors (traces, pads, via holes, etc) on the thermal interface side of the board and with an R3 keepout area around fastening holes on the non-thermal interface side of the board.  This applies even if the CCPMC does not imlement the optional thermal interfaces."

.....or something like that; you get the idea.

Or does the terminology "component keepout" also imply conductor keepout?  I don't think this is clearly expressed in the standard.

(2) Figure 4-1 requires some additional detail regarding the anti-fretting bar.  If I was designing to this standard as currently presented, I would conclude the bar is up to 4 mm wide (consistant with the center primary thermal interface) and the tapped holes are centered on this bar.  If you do this with a 4mm bar, the PNx connector side of the bar would be 5mm deep from the edge of the CCPMC and would clearly be encroaching on the PNx connectors and their related SMT pads !! :'(  Does this 3mm center of the mgt hole to the back edge of the CCPMC board approach mechanically work at all?  HELP!