CAEN S.p.A.
Via Vetraia, 11
55049 Viareggio (LU), ITALY
Telephone: +39 0584 388 398
Fax: +39 0584 388 959
E-mail: info@caen.it
http://www.caen.it
CAEN S.p.A. Costruzioni Apparecchiature Elettroniche Nucleari is one of the most important industrial spin offs of the Italian Nuclear Physics Research. The company was founded in Viareggio (Italy) in 1980 by a group of senior engineers from the Istituto Nazionale di Fisica Nucleare and today still designs and manufactures sophisticated electronic equipment for Nuclear Physics Research. CAEN is recognized world wide as one of the leading company in this field. CAEN controls all the stages of the realization of its products, from design to production. It can collaborate with the experiments from the very early stage of their conception to the running period providing impeccable after sale support. The quality of its products is monitored by the UNI EN ISO 9000-1 standard. Years of intensive collaboration with the world's major Research Centers have brought a continuous updating of its products' technology.
Analog I/O Boards
| Function | Description | Software Support | ADDR/ DATA Width | Size |
|---|---|---|---|---|
| Resolution: 8 bit; maximum sampling rate: 500 MS/s; external trigger or programmable voltage threshold for automatic triggering; front panel clock In/Out available for multi-board syncronisation; external ADC clock input or PLL synthesis from internal/external reference; trigger Time stamps; 2 Msamples memory per channel (expandable); programmable event size and pre-post trigger adjustment; VME64X compliant interface; optical link interface; FPGA firmware upgradable via VME. Model No. V1721 | ||||
| 8 channels; resolution: 14 bit; maximum sampling rate: 100 MS/s; external trigger or programmable voltage threshold for automatic triggering; front panel clock In/Out available for multi-board syncronisation; external ADC clock input or PLL synthesis from internal/external reference; trigger Time stamps; 512 Ksamples memory per channel (expandable); programmable event size and pre-post trigger adjustment; VME64X compliant interface; optical link interface; FPGA firmware upgradable via VME. Model No. V1724 | ||||
| 8 channels; A/D conversion: 8 bit; sampling frequency 15 MHz; digital amplitude pulse analysis by 8 thresholds levels programmable by VME bus; counting rate fixed by external clock; onboard digital 'Pile Up' rejction; 8 counters (12 bit) per input (one for each amplitude level) for totality of incoming pulse; 8 counters (12 bit) per input (one for each amplitude level) for incoming pulse vafter digital 'Pile Up' rejection; on board calibration capability; on board FIFO memories allowing to store the 8 ADC output data. Model No. V730 | ||||
| 300 MHz bandwidth; 1 or 2 GHz sampling frequency; A/D conversion: 12 bit; full scale range: ± 0,5 V; 250 µV LSB; 2520 usable sampled points; four trigger mode operation (on signal, external, auto, auto+normal) with rising or falling edge detection; GPIB interface; integral non linearity: ± 0,1%, differential non linearity: ± 0,05%. Model No. V1729 | ||||
| Houses two independent Analog to Digital Conversion channels for the readout of analog multiplexed signals. It is controlled by CAEN V551B. Four ranges: 0.15, 0.30, 0.75, 1.50 V; Resolution: 10 bit; maximum sampling rate: 5 MHz; conversion time: 400 µs. Model No. V550 | ||||
| Houses two independent Analog to Digital Conversion channels for the readout of analog multiplexed signals. It is controlled by CAEN V551B. Four ranges: 0.15, 0.30, 0.75, 1.50 V; Resolution: 12 bit; maximum sampling rate: 5 MHz; conversion time: 400 µs. Model No. V550A | ||||
| Controls up to 19 V550/V550A modules; maximum multiplexing frequency: 5MHz; programmable duty cycle. Model No. V551B | ||||
| Range: 2V; resolution: 12 bit; maximum sampling rate: 40 MS/s; conversion time: 100 µs; single-ended or differential input signals; external or internal clock. Model No. V729 | ||||
| Range: 4V; resolution: 12 bit; conversion time: 5.7 µs (32 channels); fast clear time: 600 ns; zero and overflow suppression for each channel; 32 events buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; live insertion. Model No. V785 | ||||
| Range: 4V; resolution: 12 bit; conversion time: 2.8 µs (16 channels); fast clear time: 600 ns; zero and overflow suppression for each channel; 32 events buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; live insertion. Model No. V785N | ||||
| Two simultaneius ranges: 4V and 500mV; resolution: 12 bit; conversion time: 2.8 µs (8 channels); fast clear time: 600 ns; zero and overflow suppression for each channel; 32 events buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; live insertion. Model No. V1785 | ||||
| Range: 400 pC; resolution: 12 bit; conversion time: 5.7 µs (32 channels); fast clear time: 600 ns; zero and overflow suppression for each channel; 32 events buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; live insertion. Model No. V792 | ||||
| Range: 400 pC; resolution: 12 bit; conversion time: 2.8 µs (16 channels); fast clear time: 600 ns; zero and overflow suppression for each channel; 32 events buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; live insertion. Model No. V792N | ||||
| Range: 400 pC; resolution: 12 bit; conversion time: 5.7 µs (32 channels); fast clear time: 600 ns; zero and overflow suppression for each channel; 32 events buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; individual gate input per channel; live insertion. Model No. V862 | ||||
| Two simultaneous ranges: 100 pC and 800 pC; resolution: 12 bit with 15 bit dynamic range; conversion time: 5.7 µs (16 channels); fast clear time: 600 ns; zero and overflow suppression for each channel; 32 events buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; live insertion. Model No. V965 | ||||
| Two simultaneous ranges: 100 pC and 800 pC; resolution: 12 bit with 15 bit dynamic range; conversion time: 5,7 µs (8 channels); fast clear time: 600 ns; zero and overflow suppression for each channel; 32 event buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; live insertion. Model No. V965A |
Digital I/O Boards
| Function | Description | Software Support | ADDR/ DATA Width | Size |
|---|---|---|---|---|
Strobed Multihit Pattern Unit | 16 input channels ANDed with a GATE signal; Two versions: NIM or ECL inputs; fast CLEAR input; fast OR output; moultiple hits register. Model No. V259 | |||
| NIM or TTL inputs and outputs; individual channel enabling/desabling; software I/O generation; fully programmable ROA interrupter; live insertion. Model No. V977 | ||||
| User customisable FPGA Unit (with preloaded demo code); expandible channel interface by adding up to three indipendent mezzanine boards, choosing between the four available types: 32 LVDS/ECL/PECL input channels (mod No. A395A), 32 LVDS ouput channels (mod No. A395B), 32 ECL ouput channels (mod No. A395C), 8 NIM/TTL input/ouput channels (mod No. A395D); LVDS/ECL/PECL inputs (differential); 64 inputs, expandable to 162 (with 32 outputs); 32 inputs, expandable to 130 (with 64 outputs); 405 MHz maximum frequency supported by clock tree for registered logic; I/O delay smaller than 15 ns (in Buffer mode); programmable 3-color LED. Model No. V1495 |
Special Function Boards
| Function | Description | Software Support | ADDR/ DATA Width | Size |
|---|---|---|---|---|
| Full scale range: 52 or 104 µs; 19 bit resolution; Least Significative Bit: 100, 200 or 800 ps; ECL/LVDS inputs; double hit resolution: 4 ns; rising and trailing edge detection; 32 event buffer memory; BLT32/MBLT64/CBLT32/CBLT64 cycles supported; live insertion. Model No. V1190A | ||||
| Full scale range: 52 or 104 µs; 19 bit resolution; Least Significative Bit: 100, 200 or 800 ps; ECL/LVDS inputs; double hit resolution: 4 ns; rising and trailing edge detection; 32 event buffer memory; BLT32/MBLT64/CBLT32/CBLT64 cycles supported; live insertion. Model No. V1190B | ||||
| Full scale range: 52 or 104 µs; 21 bit resolution; Least Significative Bit: 25 ps; ECL/LVDS inputs; double hit resolution: 4 ns; rising and trailing edge detection; 32 event buffer memory; BLT32/MBLT64/CBLT32/CBLT64 cycles supported; live insertion. Model No. V1290A | ||||
| Full scale range: 52 or 104 µs; 21 bit resolution; Least Significative Bit: 25 ps; NIM inputs; double hit resolution: 4 ns; rising and trailing edge detection; 32 event buffer memory; BLT32/MBLT64/CBLT32/CBLT64 cycles supported; live insertion. Model No. V1290N | ||||
CAENET VME Controller | Remote control of up to 99 CAENET nodes via VME cycles;Interrupt generation on data receiving; Manual or software reset; 125KByte/s transmission rate; Tx/Rx data buffers (Up to 4 Kwords). Model No. V288 | |||
Generator | 2 independent GATE generators; GATE width programmable from 100 ns to 10 s (100 ns step); GATE width display for each channel; NIM I/O signals; external, push-button or VME trigger; begin GATE and end GATE signals avaiable. Model No. V462 | |||
Gate and Delay Generator | Independent programmable gate and delay generators; delay and gate width programmable via VME for each channel; 500 ns full-scale value of GATE width and delay; ECL I/O signals; TEST, VETO and CLEAR inputs; to be used only with V430 backplane. Model No. V486 | |||
| 8 indipendent NIM to ECL/NIM and ECL to NIM/ECL channels; NIM and ECL fan-out of 2; working frequency up to 300 MHz; I/O delay <5 ns; COMMON IN input with a fan-out of 16 (NIM and ECL). Model No. V538A | ||||
| 16 indipendent 32-bit deep counting channels; cascadeable channels (up to 64-bit); counting frequency: 100 MHz; 3 versions: ECL, NIM or TTL inputs. Model No. V560 | ||||
| 30 ns max. relative input delay; 200 ps timing resolution; 32 differential ECL inputs; 16 ECL outputs with fan-out of two; VETO input; to be used only with V430 backplane. Model No. V706 | ||||
| Full scale range: 0.8 ms (with 40 MHz internal clock); resolution: 20 bit; Least significative Bit: 0.8 ns; possibility of external clock (up to 45 MHz); double hit resolution: 10 ns; rising and falling edge detection. Model No. V767 | ||||
| Full scale range: 0,8 ms (with 40 MHz internal clock); resolution 20 bit; least significative bit: 0,8 ns; possibility of external clock (up to 45 MHz); double hit resolution: 10 ns; rising and falling edge detection. Model No. V767A | ||||
| Full scale range programmable from 140 ns to 1.2 us; resolution: 12 bit; Least Significative Bit: from 35 to 300 ps; conversion time: 5.7 µs (32 ch.); 32 event buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; live insertion. Model No. V775 | ||||
| Full scale range programmable from 140 ns to 1.2 us; resolution: 12 bit; Least Significative Bit: from 35 to 300 ps; conversion time: 2.8 µs (16 ch.); 32 event buffer memory; BLT32/MBLT64/CBLT32/CBLT64 data transfer; live insertion. Model No. V775N | ||||
| Individually programmable thresholds; ECL outputs with fan-out of two; programmable output width and dead-time; TEST and VETO inputs; OR, CURRENT SUM and MAJORITY outputs. Model No. V812 | ||||
| High sensitivity with small signals; individually programmable thresholds; ECL outputs with fan-out of two; programmable output width; TEST and VETO inputs; OR, CURRENT SUM and MAJORITY outputs. Model No. V814 | ||||
| 32 indipendent 32-bit channels; counting frequency: 250 MHz; 2 versions: ECL or LVDS inputs; BLT32/MBLT64/CBLT32/CBLT64 data transfer; 32 kwords multi-event buffer memory; live insertion. Model No. V830 | ||||
| Adjustable attenuation up to 44.5 dB (0.5 dB steps); cascadeable channels; input bandwith >300 MHz; maximum input power: 100 mW; no power supply required. Model No. V859 | ||||
| Individually programmable thresholds; ECL outputs with fan-out of two; selectable Updating/Non-Updating mode; programmable output width; TEST and VETO inputs; OR, CURRENT SUM and MAJORITY outputs. Model No. V895 | ||||
| Four independent sections; bipolar inputs; three 4 In/4 Out and one 3 in/3 out sections; one discriminator channel; inverting or non-inverting mode independently selectable on each section; 120MHz bandwidth Model No. V925 | ||||
| Completely passive delay via a set of calibrated coaxial cable stubs (50 Ohm); delay from 2.6 to 34.1 ns (0.5 ns step); accuracy: 100 ps. Model No. V972 | ||||
| Adjustable gain up to x10 (x1 steps); input bandwith: 170 MHz; input impedance: 50 Ohm; output dynamics: ±2 V; cascadeable channels; rise time <3 ns; I/O delay <3 ns. Model No. V974 | ||||
| Gain x10; input bandwith: 250 MHz; input impedance: 50 Ohm; output dynamics: ±2 V; cascadeable channels; rise time <1 ns; I/O delay <3 ns. Model No. V975 | ||||
| Four indipendent sections with four channels each; TTL and NIM inputs automatically detected; NIM/TTL selectable output level; AND, OR, Majority function with selectable number of inputs; logic Fan-In Fan-Out; selectable direct or negated output. Model No. V976 | ||||
| Produces NIM and ECL pulses whose width ranges from 50 ns to 10 s; manual or pulse-triggered START and RESET; mono-stable or bi-stable operation; END-MARKER pulse; VETO input. Model No. V993B | ||||
| Produces NIM and ECL pulses whose width ranges from 50 ns to 10 s; manual or pulse-triggered START and RESET; mono-stable or bi-stable operation; END-MARKER pulse; VETO input; locking dial switches for coarse adjustment. Model No. V993C | ||||
| Full scale range: 52 or 104 µs; resolution 17 or 19 bit; Least Significative Bit: 100, 200 or 800 ps; ECL/LVDS inputs; double hit resolution: 5 ns; leading and trailing edge detection; 32 k x 32 bit output buffer; BLT32/MBLT64/CBLT32/CBLT64 cycles supported; live insertion. Model No. VX1190A | ||||
| Full scale range: 52 or 104 µs; resolution 17 or 19 bit; Least Significative Bit: 100, 200 or 800 ps; ECL/LVDS inputs; double hit resolution: 5 ns; leading and trailing edge detection; 32 k x 32 bit output buffer; BLT32/MBLT64/CBLT32/CBLT64 cycles supported; live insertion. Model No. VX1190B | ||||
| Full scale range: 52 µs; 21 bit resolution; Least Significative Bit: 25 ps; ECL/LVDS inputs; double hit resolution: 5 ns; leading and trailing edge detection; 32 k x 32 bit output buffer; BLT32/MBLT64/CBLT32/CBLT64 cycles supported; live insertion. Model No. VX1290A | ||||
| Full scale range: 52 µs; 21 bit resolution; Least Significative Bit: 25 ps; NIM inputs; double hit resolution: 5 ns; leading and trailing edge detection; 32 k x 32 bit output buffer; BLT32/MBLT64/CBLT32/CBLT64 cycles supported; live insertion. Model No. VX1290N |
Bus Interfaces
| VMEbus To: | Description | Software Support | ADDR/ DATA Width | Size |
|---|---|---|---|---|
Bridge | No boot required, ready at power ON; up to 30 MByte/s sustained data transfer rate; VME Master (arbiter or requested); VME Slave (register and test RAM access); cycles: RW, RMW, BLT, MBLT, IACK, ADO, ADOH; addressing: A16, A24, A32, CR/CSR, LCK; data width: D8, D16, D32, D64; system controller capabilities, interrupt handler; front panel Dataway Display (avaiable also fron PC and VME); 5 outputs and 2 inputs, NIM or TTL, fully programmable; VME 64X Backplane required. Model No. VX1718 | 2000/XP Linux | ||
Optical Link Bridge | No boot required, ready at power ON; daisy chain capability; PCI 32bit/33MHz; up to 70 MByte/s sustained data transfer rate; VME Master (arbiter or requested); VME Slave (register and test RAM access); cycles: RW, RMW, BLT, MBLT, IACK, ADO, ADOH; addressing: A16, A24, A32, CR/CSR, LCK; data width: D8, D16, D32, D64; system controller capabilities, interrupt handler; front panel Dataway Display (avaiable also fron PC and VME); 5 outputs and 2 inputs, NIM or TTL, fully programmable; VME 64X Backplane required. Model No. VX2718 | 2000/XP Linux | ||
Parallel Port Interface | Basic VME master operations supported; easy debug of VME modules from PC parallel port interface;LED display of VME bus activity; AS, DS0,DTACK,BERR and IACKOUT panel outputs; 300 Kbytes/s transfer rate in BLT cycle; stand alone configuration supported. Model No. V718 | |||
| USB-VME Bridge. Easy VME control: you just need to plug the module in the crate and to connect it to an USB port on your PC. No boot required; USB2.0; up to 30MB/s; master; slave; VME64 and VME64X versions; system controller; interrupt handler; front-panel display; 7 I/O programmable; Software in C, Visual Basic, LabView. Model No. V1718 | 2000/XP Linux | |||
| PCI-VME Bridge. The bridge consists of three parts: a PCI card (A2818), a VME module (V2718) and an optical fibre. For multi-crate control, you just need to add one more V2718 for each additional crate and connect them in daisy chain via optical fibres. No VME boot required; PCI32bit/33MHz; up to 50MB/s; master; slave; VME64 and VME64X versions; system controller; interrupt handler; front-panel display; 7 I/O programmable; Software in C, Visual Basic, LabView. Model No. V2718 - A2818 | 2000/XP Linux |
Powered Enclosures
| Configuration | Available Slots | Description | Size |
|---|---|---|---|
| 19 inch x 5U enclosure; 9 slot for 6U x 160mm VME modules; pluggable 350W power supply; VME64 J1/J2 monolithic backplane; short circuit protection; over/undervoltage protection; over temperature protection; remote control via CANBUS; powered by 220 VAC or 115 VAC, 50-60 Hz; CBLT cycles supported. Model No. VME8002 | |||
| Low cost compact solution; 19 inch x 7U (6+1) enclosure; 21 slot for 6U x 160mm VME modules; 470W power supply; VME64 J1/J2 monolithic backplane; short circuit protection; over/undervoltage protection; over temperature protection; 1U space for fan unit; powered by 100-230 VAC, 50-60 Hz; CBLT cycles supported. Model No. VME8010 | |||
| Low cost compact solution; 19 inch x 7U (6+1) enclosure; 21 slot for 6U x 160mm VME modules; 470W power supply; pluggable power supply; VME64 J1/J2 monolithic backplane; short circuit protection; over/undervoltage protection; 1U space for fan unit; over temperature protection; powered by 100-230 VAC, 50-60 Hz; CBLT cycles supported. Model No. VME8011 | |||
| 19 inch x 8U (6+2) enclosure; 21 slot for 6U x 160mm VME modules;plugglable power supply; available with VME64, VME64X and VME430 compliant monolithic backplane; Pluggable 2U fan unit; short circuit protection; over/undervoltage protection; over temperature protection; optionally available with CANBUS or ethernet interface for remote monitoring and control. Model No. VME8100 |
CAEN Proprietary Mezzanine Modules
| Function | Description |
|---|---|
| 200 MHz bandwith; 32 input channels; signal: LVDS/ECL/PECL (single ended TTL optional) 110 ohm Rt, extended common mode input range -4V to +5V, fail safe input feature; direct logic; front panel connector: Robinson Nugent P50E-068-P-SR1 type, (34+34) pins. Model No. A395A | |
| 250 MHz bandwith; 32 output channels; signal: LVDS 100 ohm Rl; direct logic; front panel connector: Robinson Nugent P50E-068-P-SR1 type, (34+34) pins. Model No. A395B | |
| 300 MHz bandwith; 32 output channels; signal: ECL; direct logic; front panel connector: Robinson Nugent P50E-068-P-SR1 type, (34+34) pins. Model No. A395C | |
| 250 MHz bandwith; 8 I/O selectable channels; signal: NIM/TTL selectable 50 ohm Rt; logic: TTL IN/OUT= direct, NIM IN=invert NIM OUT=direct; front panel connector: LEMO 00. Model No. A395D |
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