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Since the announcement of VMEbus in 1981 there have been a great number of people and ideas that have had an impact on the development and advancement of open standards used in critical embedded computing systems. The intention of the VITA Technologies Hall of Fame is to honor and preserve the remembrance of those people and technologies that have had the greatest influence on the VITA open standards industry. Many others are to come – innovators and influencers who have made a significant impact on developing, designing, creating the technology, and ferrying the technical specifications into open standards. These are the people who have overcome the technical and procedural problems, the products that set new expectations. It is our pleasure to honor these primary contributors to this industry.

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  • Monday, April 16, 2018 8:30 AM | Jerry Gipper (Administrator)
    Induction: April 2018

    While a young engineer at Bell Labs, in the early 1980s, Banton cut his teeth on VMEbus where he took part in an effort that mapped the VMEbus specification to an AT&T proprietary line-card format for a switching system they were developing in research. He later landed at Mercury Systems for a decade, starting there in 1996.

    At Mercury Systems, he took part in many of the standards activities that were key to the future generations of Mercury System products. Some of the concepts, which set the foundation for VITA-48 VPX REDI, were innovations borne out of the Mercury Systems PowerStream 7000 development. Seven patents were issued to Banton, and members of the development team, for those innovations.

    He vividly recalls making the proposal for what became VITA-48 VPX REDI. It was in the upper-room of a Scottsdale meeting location; he had mostly lost his voice overnight and struggled to do the presentation. He felt like he had done a lousy job, and wow! – He closed to a robust round of applause from the excited attendees.

    The VITA 48 working group was formed at the January 2004 VSO meeting. The purpose of the group was to develop an enhanced thermal management standard suitable for the new ruggedized VPX initiative. A standard, which would harmonize the various cooling methods: Air, conduction, spray, and liquid flow-through. The title of the original draft was “Mechanical Specifications for Microcomputers Using Enhanced Ruggedized Design Implementation (ERDI).” With the magic of marketing insight from Rich Jaenicke, “ERDI” was rearranged to the market-friendly “REDI” (Rugged Enhanced Design Implementation)!

    Banton took part in the development of many VITA standards (VITA 5.1, VITA 17, VITA 41, VITA 46, VITA 47, and VITA 50, to name a few) as a key contributor by supporting, chairing, and working the details directly or feeding back into others at Mercury Systems.

    Key contributions:
    • VITA 48 VPX REDI – working group chair for more than two years
    • VITA 42, Rapid IO mapping – working group chair until publication
    • 26 patents spanning his career – the first was one from Bell Labs, the research switching system which used VMEbus
    • A motivating force behind the Mercury Systems and VITA patent license agreement for U.S. Patent No. 6,759,588
  • Monday, April 16, 2018 8:00 AM | Jerry Gipper (Administrator)
    Induction: April 2018

    John Wemekamp spent over thirty-two years in the embedded computing industry. He was a leader in influencing and advocating key VITA standards.

    After graduating with an Electrical Engineering degree from Queens University in Kingston, Ontario, Wemekamp started his engineering career with Bell-Northern Research, leading a development team in telecommunication products.

    Wemekamp spearheaded the VMEbus board level product hardware design effort at Dy 4 Systems in Ottawa, during the early 1980s where he led the design and development of their first generation of VMEbus products. During this time, he played an influential role at VITA standards meetings and during the IEEE 1014, and later ANSI, standardization process that followed the enthusiastic market adoption of VMEbus.

    Wemekamp’s career spanned from hardware engineering and management to marketing, business development, and strategic planning. He retired in 2015 from Curtiss-Wright as their Business Development & Chief Technology Officer for Defense Solutions (DS) & Integrated Sensing (IS).

    Throughout his career, Wemekamp was recognized as pre-eminent authority in strategic planning, technical vision and innovation, marketing and business development, and in acquisition leadership.

    Key contributions:
    • As a member of the VMEbus Manufacturers Group, actively supported development of Revision B of the VMEbus specification in 1982, and then following the beginning of VITA, supporting creation of VITA 1014 and in later years VPX
    • VMEbus technical standards promotion through presentations at the BUSCON Bus/Board Users Show and Conferences (during late 80s), numerous articles published in trade magazines endorsing VMEbus, particularly for rugged applications, and representing Dy 4 Systems technology road show presentations at systems integrators worldwide
    • Industry voice in influencing worldwide aerospace & defense systems integrators and their military end customers to accept the benefits of commercial-off-the-shelf (COTS) and leverage the growing COTS industrial base of companies, to offer reduced life cycle ownership costs and faster technology deployment of embedded computing systems, for the benefits of all warfighters
  • Monday, April 16, 2018 7:45 AM | Jerry Gipper (Administrator)
    Induction: April 2018

    Very few people contribute so passionately to their interests as Joe Pavlat. He loved flying his plane, driving his Porsche, hiking, writing, and traveling. He is honored for his passion of industry computing and his contribution as role of president of the PCI Industrial Computer Manufacturers Group. Pavlat was the first, and only president until his death in September of 2016.

    Pavlat started down the path of becoming a physicist while studying at the University of Wisconsin in Madison before graduating with a B.S. degree in Engineering in 1975. He started his professional career as a hardware engineer honing his technology expertise of motion control and robotic systems.

    Pro-Log Corp. brought him onboard in 1989 to lead their marketing efforts of STD bus. He never strayed far from engineering where he also held roles in engineering management, guiding the development of hardware products.

    Pro-Log was a primary contributor to the development of CompactPCI, which was mapped out as the future for STD bus. Pavlat was deeply involved from the beginning. When it looked like a standard was emerging, he participated in forming PICMG in 1994. He was directly involved in the development of both the CompactPCI and AdvancedTCA standards.

    He stayed actively connected to physics by participating in experiments in Antarctica and on top of the Haleakala volcano in Hawaii. Pavlat also volunteered his time flying for the Monterey Sheriff’s department Aero Squadron.

    Pavlat’s passion for writing and all things PICMG made for a perfect partnership with OpenSystems Media where he served as Editorial Director for several PICMG publications.

    Key contributions:
    • President of PICMG
    • VITA Board of Directors
    • Evangelist for open standards
  • Tuesday, April 11, 2017 9:00 AM | Jerry Gipper (Administrator)
    Induction: April 2017

    Robles is a retired Boeing Senior Technical Fellow with over thirty years of experience in electronic packaging disciplines including system architectures, hardware design for commercial and military ground and airborne avionics, mechanical tolerance analysis, thermal and dynamic/vibration analysis, weights/mass properties analysis, design of experiments, environmental analysis and test, reliability, and environmental stress screening.

    He is a recognized expert on the application of commercial-off-the-shelf (COTS) hardware on military platforms. Robles led the ITAA working group for EIA-933 Standard for Preparing a COTS Assembly Management Plan. He was the Boeing Focal for VITA and PICMG, developing open standards for next generation COTS assemblies for military/aerospace applications.

    Robles’ technical leadership in VITA drove the development of standards and COTS VPX products that are compatible with two-level maintenance. He led the implementation team that established a two-level maintenance baseline on FCS resulting in projected life cycle cost savings of $4 billion for the ICS alone.

    His development of a practicable liquid flow-through cooling design resulted in a 30 percent weight and volume reduction in the F/A-18 E/F active electronically scanned array (AESA) radar processor. His led a multi-company team to develop a mission systems design that the customer regarded as “nearly flawless.”

    Robles received a Special Incentive Award for the $50 million projected savings from the application of his approach for the integration of COTS electronics on AWCS Extend Sentry hardware. He is a prolific consultant who has been involved with many Boeing programs including 787, 737 RS, AWACS, F-15, F/A-18, F/A-22, FCS, P-8, V-22, and WedgeTail.

    Robles was the Boeing Fellowship focal for Communities of Practice and Knowledge Management. He presented well-received workshops at the University of California at Berkeley, WSU, and at Society of Hispanic Professional Engineers National Technical Career Conferences.

  • Tuesday, April 11, 2017 8:30 AM | Jerry Gipper (Administrator)
    Induction: April 2017

    Parsons was a long-time participant in the VITA Standards Organization (VSO). He participated in countless working groups over his twenty-plus years of contributions, extending all the way back to the original VMEbus standard. He was the chair of the VITA 30.x (2mm Connector Practice for Eurocard Systems) working group. Parsons was the chairman of the VSO for nine years. During his tenure, VITA adopted new ex ante patent terms for its members, setting a new high-bar for standards development organizations. It was also during his years that VPX became the mainstay activity for the VSO.

    In 1996, Parsons joined the VITA board of directors as the representative for AMP who had just become a sponsor member. He was involved in many changes that VITA experienced in those years, as the charter expanded from VMEbus to include other technologies important to the critical embedded computing industry.

    Connector technology is the root of many of the standards developed by VITA, Parsons’ background in the connector industry was key to his contributions to the many standards he was involved in during his career. After graduating with an aerospace engineering degree and working in that industry for seven years, Parsons moved to AMP as a product engineer and later as the Harrisburg liaison for AMP Packaging Systems. In 1988, he moved to AMP Standards and Approvals department as a Standards Development Manager where he was a key contributor to dozens of VITA standards. He also participated in PICMG, IEEE, SFF, SCSI, and other standards activities, continuing after the merger with Tyco Electronics and Foxconn until his retirement in 2010.

  • Tuesday, April 11, 2017 8:00 AM | Jerry Gipper (Administrator)
    Induction: April 2017

    With more than 30 years in the embedded computer industry, Warren Andrews combined his engineering, marketing, and journalistic skills to identify and anayze leading-edge technologies and trends. His participation in the embedded computing industry in all of his roles inspired many to greater heights. His many articles and market analysis provided insight into this emerging part of the computer industry.

    Andrews was the editorial director and publisher/associate publisher of RTC magazine, a highly respected monthly magazine in the embedded-computer industry. He also founded COTS Journal, a leading publication in the military/government electronics market.

    Prior to joining the RTC Group, Andrews worked with Computer Design, Electronic Design, and EE Times in various capacities including to his own newsletter, InfoBus Report, which he published for over 10 years. In addition, he published several marketing/technology studies including landmark volumes on the “Bus and Board Market,” and “PCI, its Markets and Technology.”

    Before joining the fourth estate in 1980, Andrews owned his own engineering and manufacturing company where he designed microprocessor-based switching systems for the retail and lodging industries. He is also the developer of several unique products for the security and automotive industries and holds a U.S. Patent for one of his inventions.

    Andrews has been the keynote speaker at the PCI SIG annual meeting, a regular speaker at the annual Bus and Board Conference, and was often invited to participate at company-specific events with companies that include Motorola, Wind River Systems, and Zilinx.

    Andrews was on the Board of Directors of SBS Technologies and the board of advisers of StarGen, Inc.

  • Sunday, May 15, 2016 8:00 AM | Jerry Gipper (Administrator)
    Induction: May 2016

    Lyman Hevle was the founding executive director of the VMEbus International Trade Association (VITA). He held that role from its inception in 1984 until 1993. During his career Lym was focused on the business and market growth of VMEbus. He passed away in January 2016, and his legacy will live on in the industry. Lym's own words best describe his involvement with VMEbus and how he came to be the founding executive director of VITA.

    Read More about Lym in his own words:

    Key Contributions
    • 1984-1993: Founding Executive Director, VMEbus International Trade Association (VITA)
  • Wednesday, July 15, 2015 10:30 AM | Jerry Gipper (Administrator)
    Induction: July 2015

    ANSI/VITA 1.5-2003 (R2009) (2eSST) is an extension of the ANSI/VITA 1-1994, VME64, and ANSI/VITA 1.1-1997, VME64x standards. It defines a transfer protocol based upon source-synchronous concepts that permits the VMEbus to operate at rates to at least 320 MBps. As technology improves, this rate can be extended to higher levels. The 2eSST specification emerged out of the MBLT and 2eVME concepts that extended the performance of VMEbus data transfers. Figure 2 compares the VME64 and 2eSST standards.

    Thales Computers designed the Alma2e bridge supporting the 2eSST protocol in 2002. Tundra Semiconductor, working with Motorola, brought the Tsi148 PCI/X-to-VME2eSST bridge to market in 2004, making the 2eSST protocol available to the entire industry. Concepts exist to enhance VME2eSST that could increase performance to more than 1 GBps.

    The 2eSST protocol requires low skew between signals and monotonic rising and falling edges on the signals. To meet these requirements, limited length backplanes, special backplane topologies, and/or enhanced transceivers are required. The specification calls for enhanced bus transceivers with controlled rise and fall times, tightly defined thresholds, low part to part skew, and low-voltage transistor-transistor logic (LVTTL) levels. During the development of this standard, specific transceivers were developed to meet these requirements.

    As a source-synchronous protocol, the performance of 2eSST is determined not by the propagation delay from source to destination, but by skew – the variation in propagation delay through the drivers, backplane, and receivers. As the skew decreases, system bandwidth can increase. In theory, a source-synchronous protocol is virtually unlimited in its potential transfer rate. This standard provides for transfer rates of 160, 267, and 320 MBps with a 21-slot backplane. New transfer rates can be defined as the technology improves.

    In developing the 2eSST protocol, several important objectives were considered:

    • Maximize performance: Performance was the driving impetus for this new protocol. To meet this objective, the protocol was designed to ensure that all devices involved in the transfer would operate as fast as possible.
    • Minimize complexity: The 2eSST protocol was designed to minimize the amount of logic that would be required to implement the protocol.
    • Minimize application limits: The 2eSST protocol can be used in 3U, 6U, and 9U environments.
    • Maintain compatibility: The 2eSST protocol was designed to be compatible with legacy VMEbus products.
    Key Contributions
    • 2003: 2eSST (ANSI/VITA 1.5) – Defines VME protocol that allows data transfers up to 320 MBps.
  • Wednesday, July 15, 2015 10:00 AM | Jerry Gipper (Administrator)
    Induction: July 2015

    VMEbus started on its path to significant performance improvements while still remaining backwards compatible with legacy systems with the introduction of the VME64 concept. In 1989, John Peters of Performance Technologies developed the initial concept of VME64: multiplexing address and data lines (A64/D64) on the VMEbus. The concept was demonstrated the same year and submitted to the VITA Technical Committee in 1990 as a performance enhancement to the VMEbus specification.

    Key Contributions
    • 1989: John Peters and Bill Mahussen (Performance Technologies) developed the use of 64-bit multiplexed block transfer (MBLT) cycles and presented the VME64 concept to the VITA Technical Committee.
    • 1990: Newbridge Microsystems released DARF 64 VME64 silicon.
    • 1990: Performance Technology won the BUSCON Product of the Year award for VME64.
    • 1991: VME64 (1014 Rev. D) was introduced and submitted to IEEE, raising the theoretical bus speed from 40 MBps to 80 MBps. The IEEE granted project authorization request (PAR) for P1014R (revisions to the VMEbus specification). Kim co-chaired the activity with Ray Alderman, technical director of VITA.
    • 1992: Additional enhancements proposed to the VME64 specification were placed in VITA subcommittee: the VME64 Extensions Document. Two other activities began in late 1992: (1) VMEbus Board-Level Live Insertion specifications (BLLI), and (2) VMEbus System-Level Live Insertion with fault tolerance (VSLI).
    • 1992: Newbridge Microsystems marketed the SCV64 single-chip VME64 interface.
    • 1993: VITA subcommittees completed VME64.
    • 1994: VERO Electronics offered a VME64 backplane.
    • 1994: VME64 (ANSI/VITA 1) became the first VITA specification to receive ANSI approval. It defines the main body of the VMEbus specification and includes both 32- and 64-bit usage models.
    • 1996: IP I/O Mapping to VME64x (ANSI/VITA 4.1) was approved, defining the pin assignments from IP modules to the VME64x P0 and P2 connectors.
    • 1997: VME64 Extensions (ANSI/VITA 1.1) was approved as an extension to the VME64 specification, including the 160-pin connector, geographical addressing, and added power pins.
    • 1997: VME64x 9U x 400 mm Format (ANSI/VITA 1.3) – Defines a 9U x 400 mm board layout for use within the VMEbus framework.
    • 1998: VMEbus International Physics Association (VIPA, which includes CERN, Fermilab, and labs in Japan) rolled out VME64 Extensions for Physics (ANSI/VITA 23), which defines a series of recommended practices for the use of VMEbus in the physics community.
    • 2000: Keying for Conduction-Cooled VME64x (ANSI/VITA 1.6) was approved for VMEbus technology.
    • 2003: Gigabit Ethernet on VME64x Backplanes (ANSI/VITA 31.1) – Defines a pin assignment and interconnection methodology for implementing a 10/100/1000BASE-T Ethernet switched network on a VME64x backplane.
  • Wednesday, July 15, 2015 9:30 AM | Jerry Gipper (Administrator)
    Induction: July 2015

    In the mid-1990s the embedded computing industry became entrenched in a heated debate over mezzanine card standards for 3U and 6U boards. At one point, 22 different proposals were on the table, not to mention at least as many more proprietary options. S-bus, advocated by Sun Microsystems, was gaining traction. 

    That all changed when a handful of industry-leading companies placed their bet on the emerging efforts led by Force Computers and Digital Equipment Corporation to marry S-bus mechanicals with the PCI bus.

    In 1994 a number of companies joined together to launch the “We Agree … It’s PMC!” campaign, including Concurrent Technologies, Digital Equipment Corporation, Force Computers, Heurikon, Intel, Interphase, Mercury Computer Systems, Molex, Motorola Computer Group, Newbridge Microsystems, Schroff, Themis Computer, and Vigra. Architectures supporting PMC included VMEbus, VME64, Futurebus+, Multibus I, and Multibus II.

    A PCI Mezzanine Card or PMC is a printed circuit board manufactured to the IEEE P1386.1 standard (chaired by VITA Technologies Hall of Famer Wayne Fischer). This standard combines the electrical characteristics of the PCI bus with the mechanical dimensions of the Common Mezzanine Card or CMC format (IEEE 1386 standard, see Figure 1).

    A PMC can have up to four 64-pin bus connectors. The first two (P1 and P2) are used for 32-bit PCI signals; a third (P3) is needed for 64-bit PCI signals. An additional bus connector (P4) can be used for non-specified I/O signals. In addition, arbitrary connectors can be supplied on the front panel or bezel.

    The PMC standard defines which connector pins are used for which PCI signals. It also defines the optional 64 P4 connector pins for use of arbitrary I/O signals.

    Carrier cards that accept PMCs are usually made in the Eurocard format, which includes single-, double-, and triple-height VMEbus cards, CompactPCI cards, and more recently, VPX cards. One PMC fits on a standard 3U carrier card, while 6U models (typical for VMEbus cards) can carry up to two PMCs. Low-profile motherboards also can take advantage of the PMC architecture.

    The PMC specification evolved into Processor PMC (PrPMC), which added extensions so the PMC could act as a bus master, making it possible for it to be the host processor card in a system.

    Key Contributions
    • 1994: PMC (IEEE P1386.1) emerged out of efforts led by Force Computers and Digital Equipment Corporation to combine S-bus mechanicals with the PCI bus.
    • 1994: DEC demonstrates PMC on an Alpha VME board.
    • 2000: PMC P4 (ANSI/VITA 35) provides pin assignments for PMC P4 connector to VME P0 and P2 connectors.
    • 2001: Conduction-Cooled PMC (ANSI/VITA 20) – Defines the mechanical requirements for compliance with conduction-cooled PMC modules.
    • 2003: PrPMC (ANSI/VITA 32) – Incorporates a set of extensions to the PMC standard, which creates a new class of PrPMC cards.
    • 2003: PCI-X for PMC and PrPMC (ANSI/VITA 39) – Integrates the PCI-X bus capability from PCI bus to PMC-based products.
    • 2008: XMC: Switched Mezzanine Card base specification was introduced, bringing switch fabric interconnection to mezzanine cards for 3U and 6U.
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