The March 2018 VITA Standards Organization (VSO) standards’ meeting was hosted by the Harris Corporation in Melbourne, FL. This update is based on the results of that meeting.
Contact VITA if you are interested in participating in any of these working groups. Visit Events for details on upcoming VSO meetings. If your company is not attending the face-to-face meetings physically or via WebEx, you are missing an excellent opportunity to network, contribute and influence the future of VITA standards. We meet every two months and would love see more participation at our meetings and working groups.
Several working groups have current projects underway; the following roundup summarizes those projects:
Objective: The VITA 17.3 standard defines a serial connection intended for use on front panels of modules. VITA 17.3 enhances the existing ANSI/VITA 17.1 standard by adding support for higher bandwidth protocols.
Status: ANSI/VITA 17.3-2018 has been ratified by ANSI. The standard is available for download by VITA members and is posted at the VITA Store for purchase by non-members.
Objective: The VITA 46 base standard defines physical features that enable high-speed communication in a compliant system.
Status: The baseline VPX standard is scheduled for its five-year review. The working group is working to align it with recent work on VITA 65, VITA 66, and VITA 67. Interested parties should contact VITA to participate in the working group.
Objective: This standard defines PMC or XMC mezzanine rear I/O pin mappings to VITA 46.0 plug-in module backplane connectors.
Status: Various updates and additions have been added in anticipated for use in VPX profiles. The draft standard has been completed and submitted for ANSI accreditation.
Objective: Supplying vendors’ certification of commercial-off-the-shelf (COTS) plug-in units to this standard will facilitate the cost-effective integration of these items into larger systems.
Status: ANSI/VITA 47-2005 (R2007) has been opened for revision to improve interoperability, create less reliance on individual supplier ruggedization guidelines, and make sure environments are concurrent with recent VPX updates. The working group is nearing completion of reviewing comments on the revisions and additions. Participation is encouraged.
Several dots standards have been started to support the original VITA 47.0 standard.
Objective: This standard will establish the mechanical design requirements for an LFT-cooled electronic VPX module.
Status: The draft standard has been completed and submitted for ANSI accreditation.
Objective: The goal of this study group is to develop a new component derating standard.
Status: The study has been meeting to discuss the scope and outline potential sources of data for this activity. The working group is looking for more participation from VITA members.
Objective: The goal is to develop a next-generation standard implementing a set of connectors to support higher-speed serial interfaces on FPGAs.
Status: The draft standard has been completed and balloting for ANSI accreditation is open.
A new study group has been formed, VITA 57.5 Physical Tools to Aid in FMC+ Development, to define a set of development tools. Interested parties are invited to join this study group.
Objective: The OpenVPX architectural framework standard is a living document that is regularly updated with new profile information and corrections.
Status: New profiles based on work with Sensors Open Systems Architecture (SOSA) are being developed.
Objective: This document describes an open standard for configuration and interconnect within the structure of VITA 66.0 enabling an interface compatible with VITA 46 containing blind mate optical connectors with fixed contacts on the Plug-In Module and floating displacement on the backplane.
Status: The working group is developing the draft document.
Objective: This standard defines a VPX compliance channel including common backplane performance criteria required to support multiple fabric types across a range of defined baud rates. This allows backplane developers to design a backplane that supports required Bit Error Rates (BER) for multiple fabric types. This also allows module developers to design plug-in modules that are interoperable with other modules when used with a compliant backplane.
Status: The working group is updating the draft of this standard.
Objective: This document leverages the work done on ANSI/VITA 78 to create a standard with an emphasis on 3U module implementations. The most significant change from SpaceVPX is to shift the distribution of utility signals from the SpaceUM to the System Controller to allow a radial distribution of supply power to up to eight payload modules.
Status: The working group has developed a draft document of the standard that is currently under review.
Objective: The vision of this study group is to create a hardware technical reference framework for developing embedded computing systems through successful development of an overarching HOST strategy to maximize platform and system “openness,” modularity, interoperability, scalability, sustainability, and re-use.
Status: The HOST study group is actively reviewing the draft document and reviewing comments. This is a primary conduit into the SOSA Consortium activities.
Objective: This standard defines an environmentally enhanced connector pair, which is compatible with the pinouts as defined in VITA 62.0 for power supplies operating in harsh environments operating off of a high voltage input (270VDC). The connector pair features wider separation between input pins and a sealed connection.
Status: The working group is collecting inputs before developing a draft document.