What are your plans for building an ecosystem?
For the working group the first task is to complete and publish the QMC Design Guide. We generated a ton of material, much of which was not appropriate or needed for the standard itself. We are collecting all of that into a Design Guide document for the market. Right behind that is socializing the standard with the other card standards and getting rule language into OpenVPX to address QMC mapping to the backplane. |
What applications do you see as prime targets?
To start with any interface design for M.2, mPCIe, and many XMC applications are prime candidates for implementation on QMC. However, the high-speed connectivity of QMC introduces some interesting applications. There are some very small FPGAs and RFSoC components out there that can fit on QMC, so there is a potential for tiny high-speed acquisition cards. Deep Learning accelerators are another possible application. GPUs tend to be quite large, but the smaller ones could be used on, say, a double, triple, or quad QMC. |
What does the cost look like? Is there enough margin to make it worthwhile?
We have taken pains to make sure that we didn’t burden QMC with extra costs. Clearly the connectors are more expensive than, say, edge finger connectors, and conduction-cooled version will require milled heatsinks which drive costs. Having said that, the most interesting QMC applications will be those that can really harness the speed of the connector, so those marginal costs are probably acceptable. |
Tell me more about how you gathered and analyzed the requirements.
We spent about 6 months in a study group (for which we generated an extensive report on our work). We looked at multiple connectors and a number of physical geometries and even had some candidate pin grabs. When we started on the VITA 93 work, we were north of 90% done with the basic aspect of QMC. However, it took another 12 months’ work out the details and write (and review/edit) the draft. |
What does “Analogous to FMC modules” mean?
This is regarding the XIOm modules. FMC modules are a front panel mezzanine that provides a variety of connector options (SFP, QSFP, SSMC, USB, FireFly, D-Sub, etc.) that can plug into a carrier board with a FMC (VITA 57.1 or VITA 57.4) connector. Similarly, VITA 93.1 would allow a single QMC carrier board to use a variety of interoperable XIOm cards with different front panel connectors. With PMC and XMC modules, some vendors created their own plug-in I/O extension modules (including Acromag), but they were not based on an open standard.
Admittedly, it is not a perfect analogy since the FMC provides additional functionality for the FPGA and does not interface to another mezzanine module. |
Who is the driving connector supplier? Is the QMC connector available from different companies?
Now, it is only available from Samtec. But in the future, we expect that other companies will have an interest as well. |
What does the “Q” in QMC stand for?
Basically nothing, but
- QMCs are approximately the width on a quarter-dollar
- Come in single, double, triple and quad size
- Have a x4 (quad) PCIe interface
- Its size is less than a quarter a short XMC
- Q is the next letter after P (QMC follows PMC)
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I understand that the QMC’s Conduction-cooling has better performance than ccXMC. But what about getting the heat off an air-cooled QMC? This seems to be the same struggle as with the traditional PMC/XMC.
Due to the same orientation of the QMC relative to the carrier, this is principally correct. Nevertheless, VITA 93 (QMC) had an eye on this topic and introduced two improvements:
The variable stacking height can help to get more air to the QMC
The arrangement / placement of the connectors and mounting screws was carefully chosen to allow for some amount of airflow independent of the QMCs orientation on the carrier. In neither direction is the airflow totally blocked, there is always a path for airflow.
The QMC supplier is free to add a heatsink to their QMC, so long as they stay within the proscribed envelope. A heatsink could be of almost any design – fins, pins, etc. |
What about Rear-I/O mapping profiles that define how carriers connect the QMC’s IOPIPEs to the backplane? (Like the PMC/XMC Rear I/O Mapping for VPX, VITA 46.9) Does something like this exist?
This is a task for the carrier/system specification groups like VPX, VNX+, and so on. We expect that these working groups will start with the definition of these Rear-I/O mappings as soon as the QMC standard is adopted. VITA 90 and VITA 100 have already addressed this. |
Is it possible to build also QMCs that have only an x1 PCIe link?
Yes, PCIe is always compatible to lower link widths. |
Can I plug a Quad-QMC with an x16 PCIe-Link onto a carrier that provides 4 sites for single-QMCs?
Yes, this is no problem. Depending on the Carriers PCIe-bifurcation capabilities, your QMC may only connect with an x4 link, resulting in a reduced data transmission rate. But it will basically work. |
What is “bifurcation”?
Bifurcation describes the capability of PCIe switches to split their lanes into multiple smaller links or vice versa. As an example, a x16 link would transform into four x4 links or two x4 and one x8 link. |
How is the interface between the carrier’s IPMC and the System Management defined?
It is not defined in the QMC standard. It depends on the type of system the QMC is plugged into whether there is a System Management and an IPMC on the carrier or not. The type of interface between the carrier’s IPMC and the system management also depends on the system itself. (VPX vs. AdvancedTCA) |
How is the QMC standard utilized in SOSA / MOSA?
VITA 93 is not explicitly called out in the SOSA Technical Standard. However, it is addressed in VITA 90 which the SOSA standard has adopted. When it adopts VITA 100 (and it almost certainly will) the same is true. No one has asked for it in OpenVPX (the main hardware standard in SOSA today), but I would be surprised if that doesn’t happen before the year is out. |
How did the workgroup settle on the size of 26 x 78.25mm?
There was a lot of research and thought put into the dimensions and it changed several times as new information came to light. We knew it had to be narrower than mini PCIe to fit two modules on a VNX+ carrier with a 400-pin connector. We also wanted to make sure that some of the more powerful FPGAs that were 23 x 23mm would still fit on a single-wide QMC. The length was reduced to 78.25mm to accommodate metalwork on VPX. |
Why are the connectors at opposite ends rather than together like on XMC?
The separation between host and I/O connectors allows us to develop isolated I/O products. |
How does QMC compare to XMC in performance?
- XMC is 74 x 149mm while four adjacent QMCs or one quad QMC has a 78.25 x 104.375mm footprint (~25% smaller).
- XMC VITA 42 is PCIe Gen 4 x8, VITA 88 is Gen 5 x8 while a dual QMC can support Gen 6 x8 and a quad QMC supports Gen 6 x16.
- XMC P16 has 144 I/O pins but four QMCs provide 160 I/O.
- Both standards support IPMI.
- Both standards support conduction-cooling with a heat sink between mezzanine and carrier PCBs. While the XMC heat sink is 10mm, QMC allows variable stacking heights on the carrier of up to 16mm permitting 11.3mm of additional metal under the QMC heat sink.
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