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VPX Discussion Forum

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VPX Community

VPX is a broadly defined technology utilizing the latest in a variety of switch fabric technologies in 3U and 6U format blades. OpenVPX is the architecture framework that defines system level VPX interoperability for multi-vendor, multi-module, integrated system environments. The OpenVPX framework defines clear interoperability points necessary for integration between Module to Module, Module to Backplane and Chassis. OpenVPX recommends, but does not specify development systems to assist evaluation, prototype and development of VPX systems. OpenVPX will evolve and include new fabric, connector and system technology as newer standards are defined.


The purpose of the VPX Community is to establish an ecosystem of interested parties that promotes and creates name recognition, as well as grow adoption of the VPX specifications and technology. The alliance is responsible for educating, training, and promoting the potential capabilities of the VPX family of specifications and informing the broader community and press.


The VPX Community is focused on the advancement of the VPX family of technology. This includes VPX, VPX REDI, OpenVPX, and other related activities on the VPX roadmap. The VPX Community will promulgate the specifications emerging from the VITA Working Groups to develop a relevant ecosystem.

In 2004, VITA and its members embarked on a journey with the goal to improve the performance of VITA's VME technologies. VPX and the family of supporting specifications is accomplishing that goal. VPX (VITA 46) specifications establish a new direction for the next revolution in bus boards. VPX breaks out from the traditional connector scheme of VMEbus to merge the latest in connector and packaging technology with the latest in bus and serial fabric technology. VPX combines best-in-class technologies to assure a very long technology cycle similar to that of the original VMEbus solutions. Traditional parallel VMEbus will continue to be supported by VPX through bridging schemes that assure a solid migration pathway.

Technologies called for in VPX include:
  • 3U and 6U formats
  • 7-row high speed connector rated up to 6.25 Gbps
  • Choice of high speed serial fabrics
  • PMC and XMC mezzanines
  • Hybrid backplanes to accommodate VME64, VXS and VPX boards

The Ruggedized Enhanced Design Implementation (REDI) laid out in VITA 48 describes how to implement layout techniques to better support cooling methodologies on specific board form factors. Currently, it covers enhanced forced-air cooling (using baffles and plenums), advanced conduction cooling (using larger and more efficient thermal interfaces), and liquid cooling. It also addresses the use of ESD covers on both sides of the board, a necessary feature for military two-level maintenance strategies.

The US Department of Defense and other users are mandating improved implementation of open standards and interoperability. VPX specifications have been focused at the board level, but there is also a need for considering system-level requirements to improve interoperability and reduce customization, testing, cost, and risk.

The OpenVPX Systems Specification defines an architecture framework that manages and constrains module and backplane designs, including defining pin outs, and sets interoperability points within VPX while maintaining full compliance with VPX. 

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