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  • Monday, August 21, 2023 12:16 PM | VITA Marketing (Administrator)

    By: Matthew Burns, Samtec

    Every city has its own character, but every city also has so much in common.

    Recently I was walking through the central business district of a major Midwestern city. I was struck by how so much was unique – museums, restaurants, local sports teams, boutique hotels, parks, trails, local water holes, etc.

    On the other hand, I also had a bit of déjà vu. It seems everywhere I looked I saw McDonald’s, Starbucks, Chipotle, and other popular national restaurants. Some may say that’s a bad thing, but sometimes it’s nice to know you can get a cheeseburger or burrito that tastes the same in Portland, ME as it does in Portland, OR.

    What does this have to do with VITA 57, you may wonder? I am struck by the ubiquity of VITA 57 FMC and FMC+ interfaces.

    What does that mean, you ask? It wasn’t that long ago that system designers relied on PCI™ Mezzanine Card (PMC) and Switched Mezzanine Card (XMC) standards for I/O expansion via daughter cards, mezzanine modules or add-on cards. However, PMC and XMC were not originally configured for FPGAs.

    Connector Designs to Meet High-Speed Needs

    So, the FPGA vendors took it upon themselves to develop high-speed I/O expansion bus specifications for their development cards.  The FPGA vendors loved the design flexibility and scalability of PMC and XMC add-on cards, but more was needed to support the multi-gigabit transceivers becoming available on FPGAs.

    One option proposed and developed by Altera (now Intel PSG) was the High Speed Mezzanine Card (HSMC) Specification. HSMC defined an electromechanical interface for a high-speed add-on card targeted for FPGA development kits. (Sound familiar?) Interoperability of add-on cards from multiple manufacturers was the goal. It would have been great if the FPGA industry adopted HSMC, but…

    On the other side of Silicon Valley, a group of engineers at Xilinx (now AMD Xilinx) also recognized the need for a high-speed I/O expansion bus specification. Xilinx and their partners – other FPGA vendors, end-users, interconnect manufacturers and the like – decided an industry standard specification instead of a vendor-specific standard would likely be adopted by the fast-growing FPGAs industry as whole.

    Enter the creation of VITA 57.1 FMC.

    The Flexibility of FMC

    VITA 57.1 FMC defines the electro-mechanical interface, standard mezzanine card form factor, connectors, and modular interface to an FPGA carrier card. Decoupling the I/O interfaces from the FPGA simplifies I/O interface module design while maximizing carrier card reuse.

    VITA 57.1 FMC specifies two connector options linking the FPGA carrier card and mezzanine card. The low pin count (LPC) connectors offer 160 pins in a 4x40 array. They also provide 68 single-ended signals (or 34 differential pairs). The high pin count (HPC) connectors offer 400 pins in a 10x40 array. They also provide 160 single-ended signals (or 80 differential pairs), 10 MGTs running at 10 Gbps and additional clocks.

    FMC’s flexibility offers many benefits. These include sustained implementation and deployment of new technologies. FMC also allows for more efficient prototyping and a faster time to market for FPGA-based systems.

    Improved Performance with FMC+

    VITA 57.4 FMC+ provided an update to VITA 57.1. Fully released in July 2018, VITA 57.4 FMC+ was designed to expand upon the already popular FMC standard while avoiding the hassle of implementation into existing systems.

    FMC+ provides improved performance, faster data rates, and additional I/O, while utilizing the same footprint as FMC. Along with backwards compatibility with legacy FMC systems, FMC+ proves to be a stress-free improvement for any FPGA developer already using FMC.

    A new FMC+ connector — high speed pin count (HSPC) — offers 560 pins in a 14×40 array, 24 MGTs, and supports high-performance 28 Gbps FPGA transceivers. FMC+ also supports an optional, secondary connector — high speed pin count extension (HSPCe) — which contains 80 pins in a 4×20 array and an additional 8 MGTs (for a total of 32).*

    Figure 1 - Samtec VITA 57.4 FMC+ Connectors

    Other connectors that support FMC and FMC+ are readily available, as well. This includes modules that help to simplify connections from FPGAs/SoCs to industry-standard multi-mode fiber optic cables as well as ones that provide an easy-to-use loopback option for testing low-speed and high-speed multi-gigabit transceivers on any FPGA development board or FPGA carrier card.

    So it really is déjà vu – VITA 57 is everywhere, from VITA 57.1 and 57.4 compliant modules to extender cards that increase board-to-board spacing on any FPGA development board or carrier card and loopback cards for testing low-speed and high-speed multi-gigabit transceivers on any FPGA development board or FPGA carrier card.  It is a standard that continues to evolve with the industry.

    *Samtec provides many solutions that help FPGA developers evaluate and prototype FMC and FMC+ systems.

  • Thursday, May 28, 2020 11:01 AM | VITA Marketing (Administrator)

    Versatility in function and interoperability among components are common requirements of embedded systems, which is why standards play such a crucial role in an environment where many companies are contributing to system development.  Here we look at FMC and FMC+ and the growing need for support mechanisms that facilitate standards implementation, thereby enabling embedded engineers to develop robust and forward-looking systems for use in modern applications.

    FMC (FPGA Mezzanine Card), as defined in VITA 57, and FMC+, as defined in VITA 57.4, provide specifications describing an I/O mezzanine module with connection to an FPGA or another device with reconfigurable I/O capabilities. The low-profile design allows FMC and FMC+ to be used on popular industry standard slot card, blade and motherboard form factors, including VME, VPX, CompactPCI, AdvancedTCA, MicroTCA, PCI, PXI and many other low-profile motherboards. The compact size is highly adaptable to many configuration needs and complements existing common low-profile mezzanine technology such as PMC, XMC and AMC.

    FMC/FMC+ modules are currently utilized in several different applications and with many different host carrier form factors, and the list is growing. The result is a diverse FMC/FMC+ ecosystem that extends beyond traditional VITA boundaries, benefiting an expanding FPGA engineering community. In addition, the increasing complexity from the implementation of the newest generations of technology require better development tools than ever before.

    Why are new tools needed in an existing ecosystem?

    Because of the growth and complexity in today’s embedded systems, many designers have begun to face unique challenges in FPGA development.  These can range from mechanical concerns in unmating large numbers of mated pairs, ease of access, achieving taller stack heights as well as testing and system debugging. 

    To alleviate these concerns, a new study group within VITA was formed: VITA 57.5 Physical Tools to Aid in FMC+ Development.  The goal was to develop solutions to these problems, thereby giving FPGA designers easy-to-use options and offering flexibility in applications.  Mechanically, these tools are easy to deploy, while maintaining ruggedibility.  Electrically, designers can have confidence in utilizing these tools in existing designs without signal or performance degradation.

    What tools are included, how are they to be used?

    VITA 57.5’s study group currently includes four solutions to employ within FMC/FMC+ systems.  It is worth noting that, while the focus of this group is on FPGA development solutions, these tools can also be used within any hardware application, as well, since mechanical and electrical compatibility remain the same.  These tools include:

    1. Micro Jack Screw Precision Board Standoffs (JSOM)

    Some FPGA mezzanine cards may present a challenge to unmate from their host.  In order to ensure the connector set is not damaged, the Micro Jack Screw Standoff (JSOM) from Samtec not only acts as a standard PCB standoff, but to also aid in unmating the connector set. (Figure 1)

    Figure 1: This standardized PCB standoff also protects components from damage during the mating/unmating process of an FMC card.

    2. High Data Rate (HDR) FMC+ Cable Assembly

    FPGA development can encompass many different applications and needs.  In some cases, the addition of mezzanines cards may present a challenge to mate with the host, due to space constraints or even ease of access.  Samtec’s FMC+ HDR Cable Extension gives the FPGA developer an additional 397.8 mm of length to test the carrier cards away from the host without signal/performance degradation.  The cable is ideal for benchtop testing, system debugging, probing and FPGA development or for regularly accessing a system where cards would need to be separated from the host board.

    Figure 2: The HDR Cable Assembly enables testing of the carrier card way from the system without signal loss or performance degradation.

    3. FMC+ Loopback Cards

    FPGA carrier card developers require easy-to-use options to confirm the operation of the FMC+ expansion connector typically found on these platforms. FMC+ loopback cards make testing the HSPC and HSPCe interfaces on FPGA carrier cards much easier to manage and are ideal for benchtop testing, system debugging, probing or FPGA development.  

    These types of cards typically provide FPGA designers an easy-to-use loopback option for testing low-speed interfaces and high-speed multi-gigabit transceivers on an FPGA development board or carrier card. Two examples are Samtec's HSPC Loopback Card (REF-197618-01) and HSPC/HSPCe Loopback Card (REF-197693-01) that can run system data or BER testing on all channels in parallel. This makes evaluation and development with an FPGA much easier and an ideal substitute for 28 Gbps test equipment.

    4. FMC+ Extender Cards

    Engineers prototyping with industry-standard FPGA evaluation and development kits often leverage the FMC+ interface for I/O expansion that fits their application needs. In some cases, the mating height of the standard connectors may prevent fully leveraging the connectivity options of all FMC+ modules.

    An FMC+ extender card has been developed to place between FPGA carrier cards and FMC+ modules. The increased space provided can be used for additional I/O expansion during development.  As another alternative, the extender card provides a cost-effective option for extending the life of the FPGA carrier card used as a test platform.

    Innovations Continue

    With the four current tools—JSOMs, extension cables, loopback cards and extender cards—all currently available, VITA 57.5’s study group continues to work on other improvements.  Read the VITA 57.5 application notes or join the discussion to propose other useful tools for FMC/FMC+ on LinkedIn.

    This supporting documentation presents mechanical and electrical data along with recommendations for an FPGA design.  As these are living documents, the plan is to continue to update these periodically as other test data becomes available.  We look forward to the growth of FPGA development and the VITA hardware markets with these new tools.

  • Monday, July 23, 2018 9:00 AM | Jerry Gipper (Administrator)

    Dylan Lang, Samtec, July 2018

    View article.

  • Wednesday, February 14, 2018 9:00 AM | Jerry Gipper (Administrator)
  • Thursday, January 04, 2018 9:00 AM | Jerry Gipper (Administrator)

    Matt Burns, Samtec

    View article

  • Thursday, November 02, 2017 9:00 AM | Jerry Gipper (Administrator)

    Matt Burns, Samtec

    View announcement

  • Wednesday, March 22, 2017 9:00 AM | Jerry Gipper (Administrator)

    Matt Burns, Samtec

    View article

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